Rated at 30 MIPS at a frequency of 40 MHz, the Field Programmable System Level Integration Circuit (FPSLIC) combines an 8-bit microcontroller with over 50 kgates of FPGA or PLD programmable logic.

SAN MATEO, Calif. — Tool vendors Synplicity Inc. and Forte Design Systems Inc. this week will launch what they call the first system-level design and verification flow for programmable logic device ...

JTAG interface for FPGA development Design tool firm Altium’s latest JTAG interface is intended to allow system developers to use the firm’s Nexar test tool with their existing FPGA development boards ...

These programmable-logic devices combine CPLD flash configurability with an FPGA lookup-table architecture for lower-cost, logic-intensive designs.

A digital communication system shares many similar building blocks that comprise a digital TV transmission system design. These key building blocks begin with channel coding and modulation techniques.

AICTE, Texas Instruments and NPTEL India have invited applications from undergraduate engineering students for a massive open online course (MOOC) on Embedded System Design using MSP430. The course ...

VMetro, a company in embedded computing solutions based on standards such as VXS and XMC that utilize multi-gigabit serial interconnects, today announced one of the industry’s first FPGA processing ...