EDN

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

MicroBlaze MCS, new to the Xilinx® LogiCORE™ IP core offering, provides a turnkey microcontroller solution to Xilinx customers. It includes the MicroBlaze processor, local memory for program and data ...
EDN

Xilinx shipping ISE Design Suite 11.1

SAN FRANCISCO—Programmable logic vendor Xilinx Inc. is now shipping ISE Design Suite 11.1, described as the first FPGA design tool set with interoperable domain-specific design flows and tool ...
Design-Reuse

Xilinx ISE Design Suite 12 Enables Up to 30% Dynamic Power Reduction with Intelligent Clock-Gating Technology

AMBA 4 AXI4 IP Support and Innovations in Design Preservation Combined with ISE Power Optimization to Deliver New Levels of Productivity for Virtex-6 and Spartan-6 FPGAs SAN JOSE, Calif., May 3, 2010- ...
New Electronics

Xilinx updates ISE Design Suite to support AMBA 4 AXI4 spec

As the first stage in the introduction of IP cores that meet the AMBA 4 AXI4 specification for interconnecting functional blocks in SoC design, Xilinx has released ISE Design Suite 12.3. "Xilinx is ...
Linux Journal

Xilinx FPGA Design Tools for Linux

A field programmable gate array (FPGA) is a user-programmable piece of silicon constructed in very large-scale integration (VLSI) technology. The VLSI transistor-level detail is absolutely predefined ...
Electronics Weekly

Xilinx, MathWorks and National Instruments work on high-level FPGA design

Xilinx is working with MathWorks and National Instruments to offer IP-based design environments for its Zynq system-on-chip FPGA devices. The design tools offer graphical and text-based programming ...
Electronic Design

FPGA Design Tool Brings More Modularity To FPGA Design

Xilinx's latest incarnation of its Integrated Synthesis Environment, ISE Design Suite 12, now brings features such as ‘intelligent’ clock-gating technology to its line of FPGAs as well as a new ...
Electronics Weekly

Clock gating is key to improved design flow, says Xilinx

Intelligent clock gating is key to Xilinx’s bid to reduce dynamic block-RAM (BRAM) power consumption in its Virtex-6 FPGA designs. The key to this fourth generation partial reconfiguration design flow ...
Electronic Design

Synthesis Support Rolls For Xilinx Virtex-5 FPGAs

Two major EDA vendors—Magma Design Automation and Mentor Graphics—have both announced synthesis support for Xilinx’s new Virtex-5 family of FPGAs. Two major EDA vendors—Magma Design Automation and ...
Business Wire

Xilinx Brings Breakthrough to Vivado Design Tools with State-of-the-Art Machine-Learning Optimization for Accelerated Designs

SAN JOSE, Calif.--(BUSINESS WIRE)--Xilinx, Inc. (NASDAQ: XLNX) today introduced Vivado® ML Editions, the industry’s first FPGA EDA tool suite based on machine-learning (ML) optimization algorithms, as ...
ZDNet

Xilinx debuts software programmable chip design in data center push

Semiconductor company Xilinx is taking the wraps off of its software programmable chip design that it claims is part of an entirely new computing category. It's called the Adaptive Compute ...
Design-Reuse

Xilinx Announces ISE Design Suite 13.4 Further Extending 7 Series FPGA Support and Design Productivity

Latest release includes the New MicroBlaze Micro Controller System, Enhanced Debug with 2D Eye Scan and Partial Reconfiguration Support for Artix-7 and Virtex-7 XT FPGAs SAN JOSE, Calif. -- Jan. 18, ...