EDN

Saelig Announces TimingDesigner Timing Analysis Software Tool

Saelig Company, Inc. (www.saelig.com) is now offering TimingDesigner®, from EMA Design Automation, an interactive timing analysis software application that delivers fast and accurate results for ...
EDN

RTL Timing Analysis: An Enabling Technology for Next-Generation Digital IC Designs

Today's large and complex digital integrated circuit (IC) and system-on-chip (SoC) designs often contain tens of millions of logic gates. Ensuring that these designs will function as planned and meet ...
Embedded

Timing challenges in automotive software architectures

Software applications today control some of the most important functionalities in an automobile, ranging from basic safety functions like brake and airbag control, to driver assistance systems like ...
New Electronics

Timing analysis for C++ critical software

SDC Systems has launched the latest version of the RapiTime measurement and analysis tool. Called RapiTime 2.4, the tool is intended for use by engineers and managers responsible for timing analysis ...
Electronic Design

Improve Logic Timing with Worst-Case Analysis

Worst-case circuit analysis (WCCA) is a cost-effective means of screening a design to verify with a high degree of confidence that potential defects and deficiencies are identified and eliminated ...
Electronic Design

Software helps debug protocol timing violations using logic analyzer

Santa Rosa, CA. Keysight Technologies, Inc. today announced a new software package for use with Keysight logic analyzers, the B4661A memory analysis software. The Keysight B4661A memory analysis ...
Semiconductor Engineering

The Challenge Of Balancing Performance And Accuracy For Advanced Node Timing Signoff

As process nodes shrink, complexity, cost and overall risk expand. Process variability that once was once acceptable now becomes a critical item as operating voltage decreases. Simply adding design ...