LONDON — MIPS Technologies Inc. will present a series of enhancements to the basic MIPS32/MIPS64 instruction set architecture at this week's Microprocessor Forum in San Jose, Calif. Changes in such ...

Infineon's TriCore hybrid 16/32-bit processor is now supported by the OSE Epsilon real-time operating system (RTOS). OSE Epsilon requires as little as 4 kbytes of memory and has a context switch speed ...

Hard real-time Linux has been around for ages, or it may never appear. It all depends on who you talk to. It also depends on your requirements. A two-second interrupt latency may be acceptable for ...

Part 1 of this article series provided a detailed overview of a trigger-based vision system for embedded applications. It also delved into latency measurements of this swift response vision system ...